Signal cycling device



Aug. 24, 1954 J. P. ECKERT, JR., ETAL SIGNAL CYCLING DEVICE Filed April 15, 1950 Bgm :myers/WML ra amer psv/c55 INVENTORS.

Filed April 13, 195o J. P. ECKERT, JR., EIAL SIGNAL CYCLING DEVICE 5 Sheets-Sheet 2 /YE Tit/019K Jn/Pfe INVENTORS.

ug. 24;-, 1954 J. P. ECKERT, JR., ETAL 2,537,473

SIGNAL CYCLING DEVICE Filed April 13, 1950 5 Sheets-Sheet 5 Aug. 24, 1954 J.P. ECKERT, JR., ETAL 2,637,473

SIGNAL CYCLING DEVICE 5 Sheets-Sheet 4 Filed April 13, 1950 on un nn Nn .QSI

INVENTORS. ,UWE MJHZW 1 Filed April 13, 1950 J. P. ECKERT, JR., I'AL SIGNAL CYCLING DEVICE 5 Sheets-Sheet 5 .74% .27W @vila Patented Aug. 24, 1954 rer OFFICE v268'7A'i'3 SIGNAL CYCLING DEVICE Application April 13, 1950, Serial No. 155,628

(Cl. Z50-27) 14 Claims.

This invention relates to a frequency and phase converter and more particularly to a circuit selective timing device. Y

Heretofore delay lines have been utilized in conjunction with pulse generators for the purpose of controlling a plurality of channels or devices` This invention provides for the circulation of a signal impulse in a signal loop comprising a ,delay line, a pulse forming regenerator and a timing gate, so that once a signal impulse enters the signal loop it continues to circulate therein until the loop is cleared. Provision is made to time said signal impulse each time it completes a circuit of the signal loop thereby maintaining a high degree of precision in circuit operation. When used for selective gating or selective sequential circuit activation, it is not necessary to utilize a pulse train or other complex signal configuration, but a single preferably rectangular impulse. Absolutetiming accuracy is achieved by the provision of signal conditioned circuits which are activated only upon the coincidence of a timing impulseand circulating (circuit selecting) impulse, which will be described in detail below.

Accordingly, it is a primary object of the present invention to provide a new and improved device for selectively supplying certain specific timing impulses to selected electrical circuits.

Another object of the invention is to provide a new and improved device for the control of a plurality of channels or devices.

Yet another object of the invention is to provide a new and improved device for frequency conversion.

Still another object of the invention is to provide a new and improved phase selecting device.

A further object of the invention is to provide a new and improved device which delivers a plurality of impulses of a selected duration, frequency and phase relationship.

Another object of the invention is to provide a new and improved signal cycling device having its operation easily and accurately initiated.

Other objects and advantages of the invention will be more readily understood if the description is read in conjunction with the following gures, in which:

Figure l illustrates in block form a signal cycling device embodying the invention,

Figure 2 illustrates schematically a portion of the signal cycling device utilized to initiate its operation, f

Figure 3 illustrates schematically the signal loopof the signal cycling device,

Figure 4 illustrates schematically a compensat-ing network shown in block form -in Figure 3.

Figure 5 illustrates the signal cycling device in block form and a number of signal receiving circuits associatedtherewith in schematic form,

wFigure 6 is a timing diagram, illustrating the signals found in various parts of the signal cycling device, l

Figures` 7a, '7b and 7c illustrate voltage-time waveforms characteristic of impulse driven transmission lines, v

Figure 8 illustrates diagrammatically several of the modes by which vsignal receiving circuits may be associated with the delay line portion of a signal cycling device, and

Figure 9 is a timing diagram illustrating the signals found/in various parts of the apparatus .shown in Figure 8.

Referring nowto the drawings which illustrate a particular embodiment of this invention, in which like parts are referred to by like reference characters and values of potential are given for purposes of illustration only and not in order to limit the scope of the invention, Figure l shows in block form the cycling unit containing a single pulse device Il which is, linked to a control device I2 and has itsinput connected to a timing pulse terminal IDB and its output delivered to a coincidence signal gate I3 at the input terminal I5 and to any other equipment desired through the lead 2I. The said signal coincidence gate I3 is also connected to signal terminal Ill at the input terminal I4. A pulse forming apparatus il linked to a signal clearing device I8 receives a signal output from the signal coincidence gate I3 and delivers it to a delay line IS which is returned to said signal rcoincidence gate I3 at the input terminal I6. The said delay line i9 has a plurality of taps 20 along its length which connect with a set of signal conditioned circuits 22, 23, 24 and 25 (shown in Figure 5).

The cycling unit lis started by means of the control device l2 which allows a single. impulse to arrive at terminal It of gate I3 in coincidence with atiming impulse at input I4 `coming directly from the signal terminal IUD which delivers impulses with a repetitionI rate of 4,megacycles per second having an impulse lduration of `.O5 to .1 microseconds. The gate I3 delivers a signal to the pulse formingv apparatus Il upon `the coincidental appearance. of signals at input terminals I4 and I5 of gatel I3. The pulse forming apparatus Ilis cfa typedevelopinga rectangular impulseof,a1-predetermined width in response to an input signal. The rectangular impulse passes along the delay line I9 successively activating the taps 20 along its path and nally appears at the input terminal I6 of the gate '13. This impulse appearing at terminal I is retimed by the coincidence signal gate I3 which will not pass the signal until a timing impulse appears on its terminal I4; when this does occur, that is, the coincidence of signals appearing on terminals I4 and I6, a signal is delivered to the pulse forming apparatus I1 and the cycle just described is indefinitely repeated.

It may, therefore, be seen that once an impulse is delivered to the gate I3 at terminal I5 a signal impulse is caused to circulate indefinitely in a loop comprising the signal coincidence gate I3, the pulse forming apparatus I1, and the delay line I9. A device I8 is provided for the purposes of clearing the circulating signals from the said loop at such time when this may be desirable. A signal may again be caused to circulate in the said loop by utilizing the control device I1 linked to the single pulse device I I as already previously described.

In this invention, a delay line interposing any period of delay and a timing impulse of any repetition rate may be utilized, if provision is made for the coincidental appearance of a signal from the delay line and a timing impulse at the signal coincidence gate I3. The signal from the delay line should appear at the gate I3 slightly before the leading edge of the timing impulse, so that proper timing may be eifectuated; thereby the circulating signal is eiectively controlled by the timing impulses. The equipment may be designed so that the signal passes once around the circulating loop for an integral number of timing impulses.

Referring now to Figure 2 for greater detail, a timing pulse input terminal |00 excited by positive-going timing impulses having a plus 58 volt f' base level and an amplitude of to 30 volts with a repetition rate of 4 megacycles per second and a pulse duration of .05 to .1 microseconds, is coupled to the control grid |05 of a gate valve |04 by means of a capacitor I0 I. The control grid |05 of gate valve |04 is negatively biased by returning the grid resistors |02 and |03 to a negative potential of -60 volts. The junction point of said resistors |02 and |03 is linked to a starting terminal I4I which may be returned to a negative 21 volt potential through a start control switch |42. The screen grid III of gate valve |04 is directly returned to a positive potential of 120 volts and returned to ground through a by-pass capacitor I I2, the suppressor grid |06 is connected to cathode |01 which is grounded; the anode |08 is returned to a positive potential of 120 volts through an anode resistor |09 and also excites the control grid ||4 in a normally conducting valve I3 of a single pulse flip-flop circuit, through a coupling capacitor IIO.

The aforementioned single pulse flip-op circuit is comprised of valves ||3 and |26 which have their control grids II4 and |30 respectively crossconnected to their anodes |21 and I|5 through a related parallel resistor-capacitor combination |24 and |22, the cathode and suppressor grid of each, II6, II1, and |28, |29, are connected to ground potential, and the screen grids I I8 and I3I are directly returned to a positive potential of 50 volts and returned to ground by means of a by-pass capacitor |32. The control grids I I4 and are negatively biased by being returned to a negative potential of 60 volts through grid resistors |23 and |25 respectively. The anode |I5 of Cil said valve II3 is maintained at no less than a positive potential of 50 volts by connection to the cathode of a normally conducting crystal diode |2| whose anode is connected with a positive 50 volt bus, and is returned to a positive potential of 80 volts through the series connected anode resistor I9 and compensating inductor |20. The anode |21 of valve |26 is also returned to a positive potential of 80 volts through the series connected delay inductor |33, anode resistor |34 and compensating inductor |35. The control electrode |30 of said valve |26 is also connected through a resistor |31 to a grounded capacitor |36 which is in parallel with a resistor |39 connecting to terminal |40 of said two-position start control switch |42 whose movable contact returns to a negative potential of 21 volts.

In operation, the timing pulse train on input terminal |00 is applied to the control grid |05 of the normally nonconducting gate valve |04. The minus 60 volt bias potential on said control grid |05 prevents conduction through the gate valve |04 and the input coupling capacitor |0I prevents the transfer of the plus 58 volt base level. When it is desired to initiate operation of the signal cycling device, the start control switch |42 is transferred to a position contacting said starting terminal I4I, reducing the control grid bias on control grid |05 to minus 21 volts so that the next positive-going impulse appearing on input terminal |00 develops an anode current surge in gate valve |04 producing a negative-going impulse Which is applied to the control grid ||4 of the normally conducting valve I I3 in the single pulse flip-flop circuit. Conduction through said valve I|3 is now cut oif and transferred to valve |26. This transfer of conduction results when a negative impulse is applied to the control grid I4 of the normally conducting Valve ||3, because this valve |I3 becomes nonconductive causing its anode ||5 to swing more positive to transmit a positive impulse to the control grid |30 of the normally nonconducting valve |26, whereupon this valve |26 becomes conductive. When valve I2 6 becomes conductive, the potential on its anode |21 swings less positive to maintain a negative cutoi potential on the control grid ||4 of said valve I I3. The state of the single pulse flip-flop is maintained until it is reset to its normal state by setting the control switch |42 to contact terminal |40, causing a negative voltage to be placed on control grid |30 of normally nonconducting valve |26 resulting in its becoming nonconductive and in valve I I3 becoming conductive in the manner described previously in detail.

A buffer pulse-forming valve |46 has its control grid |49 coupled to the anode |21 of said normally nonconducting valve |26 of the single pulse flip-nop by means of a series connected signal delay inductance |33, a coupling capacitor |36 and a parallel combination of a resistor |43 and a capacitor |44. The said grid |49 is returned to a positive potential of 60 volts through the said combination of resistance and capacitance |43 and |44 in series with a resistor |45; the screen grid |52 is directly connected to a positive potential of 60 volts and is grounded through a by-pass capacitor |53. The cathode |50 and the suppressor grid I5I of said buier pulse former valve |46 are connected to ground; the anode |41 is maintained at a positive potential by being connected to the cathode of a crystal diode |51 which connects to a positive potential of volts through a limiting resistor |54 which charges a grounded capacitor |55. The said crystal diode |51 has connected across it a resistor-|56 of the value required to terminate with its characteristic impedance a short-circuited transmission line made of the combination of the inductors |58, |60, and the capacitor |59. The anode |41 is also coupled to the control grid I 63 of a coupling valve |62 by means of a capacitor |6|.

The said control grid |63 of said coupling valve |62 is biased negatively by being returned to a minus 2l volt potential by means of a grid resistor |64. The cathode |66 andsuppressor grid |61 of the said coupling valve |62 are both returned to ground potential; the screen grid |1| is directly linked to a positive potential of 120 volts and the anode |65 is returned to a positive potential of 120 volts through an anode resistor |68 and a compensating inductorA |69. The anode |65 of coupling valve |62 is also connected to the control grid 202 of an input signal electrode valve 203 shown in Figure 3, by means of a coupling capacitor 200.

When conduction is transferred to the normally non-conducting valve |26 of the single puiser nip-flop a negative impulse is transmitted to the succeeding buffer pulse forming valve |46 which is normally conductive causing it to become momentarily nonconductive, Due to the normally conductive state of the buier pulse former valve |46 the transmission line in its anode circuit contains stored energy although there is no substantial voltage drop across it. At the instant valve l 26 is cut off, the current increment acting through the surge impedance of the transmission line composed of inductors |58, |60, and capacitor |50, develops a positive-going impulse which persists through the current discontinuity and is terminated only after a positive impulse has traveled to the short-circuited end of the said transmission line and is returned 180 out oi phase as a negative impulse to the anode |41.

A characteristic terminating impedance |58 prevents reflection of said negative impulse reaching the anode end of the said transmission line. The transmission line is not activated when the buffer pulse forming valve |46 becomes conductive again, or when a positive impulse is delivered to the control grid |49 at the time the single pulser nip-flop is reset causing the anode |21 of the normally nonconductive valve |29 to swing more positive. said crystal diode |51 which keeps the input ends of the said transmission line at substantially the same potential when the said buier pulse forming valve Ult becomes conductive or has its conductivity increased.

The coupling valve |52, which is normally biased to cutoff, is made conductive by a positive-going impulse derived from the anode |41, when the said buier pulse forming valve |46 is momentarily cut off. Because of the timed constant of the coupling capacitor-resistor network |65, |64. the control grid |63 of coupling valve |92 remains positive until the negative reflected impulse is received from said transmission line at the anode |41, driving the control grid |63 negative and the coupling valve |62 to its normal ncnconducting state. Thus, a resulting negative impulse of approximately .05 microseconds duration may be derived from lthe anode |65 of said coupling valve |02. This impulse is coupled by means of capacitor |10 to other equipment, not shown, and by a capacitor 200 to the control grid 202 of an input signal valve 203 shown in Figure 3.

The said input signal valve 203 is normallyl conductive, having its control grid 202 returned This is accomplished by to a positive potential of 60 volts-by'meansoffaI grid resistor 20| and its screengrid 206ldirectly returned to the same potential. The suppressor grid 205 and the cathode 204 vof said input signal valve 203 are connected directly'- to ground;'the anode 201 is returned to a positive potential of 80 volts through an anode resis.tor-2|l8` and-a compensating inductor 200 and is prevented from becoming less positive than volts by r.being connected to the cathode -of a crystal clamping diode 2 l0 which has its anode joined `to a positive potential of 50 volts. 'I'he anode 201 is also .connected to the cathodey of a normally conducting crystal signal transferring diode 2|| which has its anode returned to a positive potential of 120 volts through a resistor 2 2. The anode of a crystal timing diode 2 I4 is likewise connected tothe said 120 volt potential source throughlthe same resistor 2| 2 having its cathode returned to the timing pulse input terminal |00 shown in Figure 2; -in a like manner the anode of a. crystal buffer diode 2l3 is connected to thesaid positive potential of 120 volts through resistor Y2.|2.l1aving its cathode returned to a positive potential of volts by means of a resistor 2| 6 and a compensating inductor 2 1 and is linked bya coupling capacitor 2 l5 to the control grid 22| of. apulseforming valve 220.

Considering the .operation of the input signal valve 203, the normally conducting crystal clamping diode 2| 0 which is returned to plus 50 volts serves as a clamp.y to .eliminate the -eifect of changes in anode current with increasing age of said input signal valve 203 and by placing a` lower limit upon the anode signal excursion. The normally conducting crystal transferring diode 2|| becomes nonconductive passing conduction to the normally nonconducting crystal timing diode 2|| when the voltage on the anode201 swings positively due to the cutoff of the input signal valve 203. Now, upon the occurrence of a timing impulse at the crystal timing .diode2l4 causing it to become nonconductive, a positive impulse is passed through the normallynonconducting crystal buler diode 2|3 and coupling capacitor `.2|5 to provide a signal input to the pulse forming valve 220. It should be noted that a positivev l base potential of 58 volts is supplied to the cathode of crystal timing diode .2| 4 resultingi'n a peak voltage of to 90 volts upon the occurrence of a timing impulse.

The control grid 22| of the .normally nonconducting pulse forming valve 220 is biased negatively by being returned to a negative potential of 18 volts by means of a grid resistor 2|8 which has connected across it, a series pair of crystal diodes 2|9 having their anode endjoined to said negative potential. The suppressor grid 223` and the cathode 224 of said pulseforming valve 220 are both returned to ground; the screen grid 225 is directly returned to a positive potential of volts and is by-passed to ground by means of a capacitor 300; the anode 226 is returned to a positive potential of volts through a tuned network comprising a parallel combination of a capacitor 230 and inductor 221 joinedto a parallel combination of a capacitor 23| and inductor 228 in series with an inductor 229, a resistor 233 and a compensating inductor 234 all in parallel with a tuned capacitor 232.

The control grid'239` of a coupling valve 238 is joined to the said tuned network at the -junction point of inductor229and resistor 233 by means of a coupling capacitor 235xand .a resistor', 236. The said control grid 239 of the normally concurrent therethrough, which ducting/coupling valve 238 is positively biased by connection to a `positive potential of 60 volts is connected by means of a by-pass capacitor 244 4to the cathode 240 and the suppressor grid 253|, which are returned to ground through a cathode resistor 243; the anode 36| is connected to the control grid '250 `of a delay line driver valve 249, by means of a coupling capacitor 248.

The control grid 22 I, of the pulse forming valve 220, is prevented from becoming more negative than minus 18 volts bythe crystal diodes 2I9, so

-that when a positive impulse appears thereon,

this normally nonconducting valve 220 becomes momentarily conductive, activating the rectangular pulse forming network in its anode circuits. The said pulse forming network is of a type known in the electronic art which, when tuned Afor a specific signal repetition rate, develops a rectangular impulse of a predetermined duration in response to a momentary interruption of the in this case results in a negative-going impulse of 0.22 microsecond duration which is transferred by the coupling valve 23'8 as a positive impulse to the control grid 250 of the delay line driver valve 24.9.

The said delay .line driver valve 249 is normally nonconducting having its control grid 256 connected to a negative bias potential of 21 volts by means of a grid resistor 25|, which has a crystal restoring diode 252 connected in parallel having its anode linked to the said lnegative potential.

The cathode 253 vlinked to the suppressor grid 254 of the said delay line driver valve 249, is `connected to ground potential; the screen grid is by-passed to .ground bya capacitor 256 and is connected to a control switch 302 which contacts .f either a terminal 258 bearing-.a positive vpotential of 120 volts or a clear terminal 259 Abearing .a negative clearing potential of `11 volts. 'The anode 260 is Ilinked toa positive clamping potential by a crystal clamping diode 26| its anode connected to positive ,potential source having a voltage determined by `later reviewed considerations, and is also fconnected -to va positive potential of 240 volts through a parallel .inductor-resistor combination 262, a delay line vI 9,

composed of a plurality of mutually coupled series connected inductors 263 lconnected at their junction to capacitors 264, which all have one side returned to a positive potential of .120 volts and an anode resistor 265. The said delay line .E9 is provided with a series of tap connections v304, .365, 306, 301, 308, 309, 3I0, '3I|, and 3I2 along its length, for the delivery of signals to apparatus specifically shown in Figure 5.

The junction pointof the delay line 1.9 and said anode resistor 265, is joined to a pair 'of parallel connected crystal diode resistor branches '3 I3 Yby connecting to theanode ofthe normally conducting diode 256 and the `cathode of the `normally nonconducting diode 210 each of which is respectively series connected to a load :resistor Y231 and a load resistor 21| connecting .in a junction point which is returned to a positive potential of 160 volts through a voltage divider resistor 269 and to a potential of 90 volts through awoltage divider resistor 268, and by-passed to ground potential through a lhum-'filtering capacitor 304. A coupling .capacitor .212 yjoins `the anode lof said ,diode 210 to the control grid 215 of -a coupling valve `214.

In operationpthe delay .line .driver valve 2.49ihas which has i .become more negative than a .pear in this'circuit in response its control-grid 259 maintained, by vmeans of the restorer diode 252, at a potential which cannot potential of minus 21 volts, so that when a positive rectangular impulse is transmitted thereto, the said valve 249 will, in response, normally become conductive. When the control switch 392 is placed in the clear position, the delay line driver valve 249 does not become conductive 1n response to positive signals upon its control grid 250, thereby preventing the transmission of signals to the delay line I9. The parallel inductor-resistor 262 combination prevents ringing or oscillations in the anode circuit of said delay line driver -valve 249, allowing a sig nal of substantially rectangular wave form to apto a positive rectangular impulse on the control grid 250.

The anode voltage excursion of the driver valve 249 is limited to the lower level of 90 volts by the normally non-conducting crystal clamping diode 26| and to an upper level dependent upon the voltage d rop through the anode resistor 265. In the foregoing discussion, the connection of the clamping diode 26| between the anode 259 of the valve 249, and a potential of approximately 90 volts has been mentioned. The purpose of this clamp is to shorten the time between the arrival of a positive-going impulse at the control grid 238 of the valve 249 and the development of the maximum negative-going excursion at the anode 266. A consideration of the diagrams in Figure '1 will make clear the requirement for the diode 25| and the manner of selecting the potential to which it is returned. Referring now to Figure 7c, it is assumed that a positive-going impulse is applied to the control grid 256 rat a time 159. The resulting anode current surge, taken in conjunction with the surge impedance of the delay or transmission line I9, produces an immediate voltage change indicated by the negative-going stroke .15| across the line I9. The anode current continues to flow, however, and as it is propagated down the line, passes successively through section after section thereoi. Each of these sections has an appreciable resistance, and as the current traverses additional sections, the anode 26B becomes progressively more negative by the amount of the additional drop contributed, as indicated by the section 152 ofthe voltage-time characteristic. At the time 155, the control electrode 25|) returns to cut-off potential, interrupting the flow of anode current, permitting the anode potential to return to its rest value along the positive-going stroke 153.

Inspection of the Figure la reveals that the negative excursion of the anode 26o continues during the presence of the positive-going grid excitation impulse, whereby the time required for the anode 260 to reach the maximum negative excursion is very considerable. Without the diode 26|, the form of the voltage wave available from the tap 364, for example, would be approximated by Figure '1b. However, by clamping the anode 260 against further excursion at the voltage level indicated by the dashed line 154 in Figure 7a, the time required for the signal to attain its final value is greatly reduced, through the elimination of the sloping stroke 152. To perform this function, the diode 26| is provided, and returned to a potential which must be at least as positive as the remainder after the subtraction of the initial surge from the anode rest potential. The initial surge magnitude is, of course, determined by measurement o1' multiplying the anode current surge by the line surge impedance. A

less positive clamping potential would permit a portion of the sloping stroke 152 to get through the circuits. A more positive clamping potential will do no harm to the general form of the impulses, but merely reduce the peak amplitude available.

The said negative impulse traverses the delay line I9 which interposes a delay of the magnitude desired. Compensating networks 400, which are shown in greater detail in Figure 4 to be composed of a network of capacitors and inductors, are interposed in the delay line I9 to correct the progressive wave form degradation suffered by the said negative impulse as it traverses the delay line I 9.

Upon reaching the load end of the delay line I9, the negative impulse is impressed on the two parallel connected crystal diode resistor branches 3I3, resulting in the nonconduction of normally conducting diode 266 and the conduction of diode 210 which transmits a negative impulse to the control electrode 215 of coupling valve 214. The normally nonconductive state of crystal diode 210 provides clipping which prevents the transmission of undesirable impulses derived from hum effects and those resulting from line mismatch. Because one of the said pair of parallel diode resistor branches 3 I3 is conducting when the other is nonconducting the function is also served of terminating the delay line I9 with its characteristic impedance to prevent signal reflection.

A coupling valve 214, which is normally conductive, has its control grid 215 biased positively by connection to a positive potential of 60 volts through a grid resistor 213, its screen grid 218 directly returned to a positive potential of 30 volts. and its cathode 216, which is linked to the suppressor grid 211, connected directly to ground. The anode 219 of said coupling valve 214 is returned to a positive potential of 120 volts by means of an anode resistor 28| through a compensating inductor 252, and has its negative voltage excursion limited by returning to a. positive potential of 80 volts by connecting to the anode end of a pair of series connected crystal clamping diodes 280. The said anode 219 is also coupled to the control grid 281 of a circulating signal valve 286 by means of a series connected coupling capacitor 283 and grid resistor 288.

The control grid 281 of said circulating signal valve 286 is biased positively through the grid resistor 258, which connects to the voltage dividing resistors 284 and 285 Which are returned, respectively, to the positive potentials of 50 Volts and 30 volts. The anode 2911 of said circulating signal valve 283 is directly linked to a positive potential of 240 volts; the screen grid 29| is returned to a positive potential of 105 Volts through a resistor 292, and is coupled by means of a by-pass capacitor 293 to the cathode 289, which is joined to the suppressor grid 290 and returned to a negative potential of 60 volts through a cathode load resistor 295, and also returned to a positive potential of 160 volts through a normally conductive signal transferring crystal diode 291 and a resistor 298. The anode of a crystal timing diode 290 is also connected to the positive potential of 160 volts through said resistor 298 having its cathode directly returned to the timing pulse input terminal 155 shown in Figure 2. In a like manner, the anode of a buffer crystal diode 290 is connected to the positive potential of 160 volts through the same said resistor 293 having its cathode returned to a positive potential of 60 volts through the previously described resistor and inductor 2 I6 and 2I1, respectively, and is also linked by means of the already described coupling capacitor 2I5 to the previously described pulse forming valve 220.

A negative impulse appearing at the control grid 215, of the coupling valve 212, results in a positive signal appearing at the control grid 281 of the circulating signal valve 220, causing this valve to become more conductive, which results in the cathode 285 swinging positively. This positive impulse is transmitted by means of said crystal signal transferring diode 291, the crystal buffer diode 295 and coupling capacitor 2 I5 to the control grid 22 I of the signal forming valve 220, under the same conditions and circumstances previously described with relation to the transmission of signals from the valve 203.

Thus it is seen, that once a pulse is fed into the signal circulating loop, comprising the signal coincidence gate I3, the pulse forming apparatus I 1, and delay line I 9, it is caused to circulate continuously, being retimedr each time it makes a circuit with a delay line n pulse periods long, retiming being eiected every nth timing iinpulse appearing at the input terminal I00. Signal circulation is terminated by applying control switch 302 to the clear position 259, whereupon no signal can enter the delay line I9 until such time when said switch 302 is returned to the positive 120 volt terminal 258 and the switch U12 (Figure 2) is placed in the start position contacting terminal I 4I, so that a pulse appearing on the terminal |08 may be passed into said signal circulation loop.

Figure 5 illustrates a group of signal conditioned circuits 22, 23, 20, and 25 used in association with said signal circulating loop by being operatively connected to taps 305, 301, 3I0, and SII respectively, along the length of the signal delay line I3. The signal conditioned circuit 22, identical With the other Vsaid circuits 23, 265, and 25, comprises a normally conducting signal valve 523, having an input grid 504 connected to a tap 305 on the signal delay line I9, through a coupling capacitor 500 and a parallel capacitorresistor combination 502, said input grid 50d being positively biased by connection to a positive potential of 60 volts through said parallel capacitorresistor combination 502 and a grid resistor 50I. The screen grid 501 of said signal valve 553 is directly connected to a positive potential of 60 volts, and is returned to ground potential by means of a by-pass capacitor 508; the suppressor grid 505 and the cathode 506 are directly connected to ground potential; and the anode 529 is returned to a positive potential of volts through an anode resistor 5I 2 and a compensating inductor 5I3. The said anode 529 is clamped to a minimum positive potential of 50 volts by means of a normally conducting crystal diode 5I@ having its anode returned to a positive potential of 50 volts; the said anode 509 is also connected to the cathode of a normally conducting crystal signal transerring diode 5I I, which has its anode returned to a. positive potential of volts through a resistor 5M. A crystal timing diode 5I5 and acrystal buier diode 5I6, both normally nonconducting, are likewise returned to a positive potential of 120 volts through the same resistor 5M, the cathode of said crystal timing diode 5 I 5 being returned to the timing pulse terminal I00 shown in Figure 2. The cathode of said crystal buier diode 5I6 is returned to a positive potential of 60 volts throughfa resistor 5I1 andV a compensating inductor 518, and is returned to ground through a coupling capacitor 5I5 and a resistor 520, a signal 1'1 output being obtained at the junction of said coupling capacitor 5 I 0 andsaid grounded resistor 523.

In operation, when a negative circulating pulse traveling along the delay line I9` reaches the tap position 305 coupled to the input grid 502 of said signal valve 503, this same valve 503 becomes nonconductive, thereby raising the anode potential above the minimum value of 50 volts and passing conduction to the normally nonconducting crystal timing diode 5I5. When a positive timing impulse is impressed upon the cathode of the crystal timing diode 5I5 stopping conduction therethrough, the voltage-drop across the resistor 5 I 4 is decreased to a value Which allows a positive signal impulse to be transmitted through the crystal buffer diode 5I6 and then through the capacitor 5I9 tothe signal output.

Thus it appears that a clocking or timing impulse is delivered at the signal output of conditioned circuit 22 (similarly circuits 23, 20, and 25) only at such times When a nonconducting period of the signal valve 503v coincides with a timing pulse. Thus, a clocking impulse may be provided for any selected pulse positions.

The versatility of a signal conditionedcircuit 22 (similarly circuits 23, 24, and may be easily seen from the diversity of methods by which the signal input to said signal valve 503 may be secured by attaching to different places and combinations of places along the signal delay line |19. A plurality of such signal conditioned circuits (22, 23, 24, 25) may be used to provide the selection of any number of specifically ordered impulses, in a series of timing pulses occurring during the period of circulation of a signal pulse f (in this case 42 timing impulses per circulating signal pulse cycle), in anyorder desiredi, for dis-V tribution to a plurality of selected signal receiving circuits (not shown) It should be noted that many other types of signal conditioned devices, for example, signal gating circuits and signal actuated nip-flop crcuits, can be easily and readily adapted for use in connection withl the said signal delay line I3, by those versed in the' electronic art, to satisfy a great diversity of specic requirements. For eX- ample, itis apparent that frequency conversion with respect to timing impulses can be accomplished by connecting a plurality of signal receiving circuits which are not conditioned by timing impulses at equidistant points along the delay line I9 for actuation by a circulating signal (not necessarily rectangular), the frequency conversion ratio being directly` dependent upon the number of signal receiving circuits, to wit, the number of signal receiving circuits divided by the number of timing impulses per circulating signal period. Equally apparent is the factvthat a signal may be derived from the delay line I9 which coincides with a circulating signal timing impulse or is delayed in time from a timing impulse; thus by appropriately selecting the points of attachment of signal receivingcircuits to the delay line I9, the signals derived may have any desired phase relationship to said circulating signal timing impulses or be displaced by a given time periodl from another derived signal.

Referring now to the timing diagram shown in Figure 6, the timing pulses appearing on the input terminal. |00, 42 of which make up a signal circulating cycle, are .25 microsecondsapart having an impulse width of .05-to0.10 microseconds. The impulse delivered by the single pulse device I I, when the signal cycling device is started, also has a duration of substantially .05 microseconds resistor 109.

12 and arrives at terminal: I5 ofthe signal coincidence gate I3 slightly before thetiming impulse in impulse position 1 is impressed' on input terminal i0 of the said signal coincidence gate I3- (Figure 1). The required amount of delay for the initiating impulse from the single pulse device I l to achieve this result is obtained by means of the signal delay inductor I33 shown in the anode circuit of flip-nop |26 in Figure 2. The coincidence of; saidf starting: impulse and timing impulse at impulse position 1v results in a signal output from the signal coincidence gate I3, which results in' the output oi a signal impulse at impulse'position 1 which has a duration of 0.22 microseconds.

I, This signal impulse passes through the delay line I0 (Figure 5), appearing at tap 303 during the third impulse position, tap 305 duringl the eighth impulse position, tap 306 during the thirteenth impulse position, and so forth, as indicated bythe timing diagram. The signal impulse is then returned to the signal coincidence gatev input IG` slightly before being retimed by a timing impulse to provide a signal impulse at the input of.y the pulse forming apparatus I1 to start a new circulating cycle at the impulse positiony 1.

EachI of the conditioned circuits 22, 23; 24, and: 25 has one ofits inputs connected to a tapiof the delay line I9 and the other input connectedl to the timing pulse terminal IUD-shown in Figuref. Each of the conditioned circuits provides an: output signalv only when a delay line'signal andl timing impulsel appear simultaneously at their respective inputs. Thus the conditioned circuit 22 provides an output signal at the impulse'position 8, the conditioned circuit 23 provides an output signal at the impulse position 17, the conditioned circuit 24 provides an output signal: at the impulse position 3l, and the conditioned circuit 25 provides an output signal at the impulse posi-v tion 36. The timing diagram shows the several input and output signals for only one completed circulating cycle which is continuously repeated as long as the signal cycling device is in operation.

Figure 8 illustrates diagrammatically several other modes by which signal receiving circuits T03-, 104, 105, and 106- may be connected with the delay line I9 of the signal cycling device. The tap 334' of delay line I9i isoperatively connected to the control electrode 1II of the normally conductive valve of the signal receiving circuit 163 by means of a coupling capacitor 101 through'v a crystal diode 10S having its anode joined to said controi electrode 1I-I and its cathode returned to ground potential by means ofa The cathode 1I@ of thenormally conducting valve 'H0 and the cathode 1I5 of a normally nonconducting Valve 'H2 in said: signal receiving circuit 103 are directly returned to a negative potential of ten volts; the screen electrodes 'H6 and H1 are directly returned to a positive potential of 35 volts and the anodes120 and 12| are respectively returned through load resistors 122 and 123 to a plus eighty volt bus.

Thel anodes and 12| are also crossconnected wtih the control electrodes H3 and 'lIfI respectively of the valves 1I2 and H0 by means of resistor-capacitor combinations 1I0 and 118. The anode 129 is further connected toa signal output terminal. The control electrodes III and 1I3 are each biased negatively by connection to a minus fifty volt bus through respective grid resistors 121 and 128. The control electrode 1I3 of valve 112 is also coupled' to the tap 306 of the delay line I9 by means of a coupling capacitor 124 through a crystal diode 125 having its anode 13 linked to the control electrode 'H3 and its cathode returned to ground potential through a resistor 126.

When a negative impulse passing through the delay line IS reaches the tap 3M, a negative signal is impressed upon the control electrode 'Ill of the normally conducting valve 'I l Il in the signal receiving circuit 763, causing this valve to become nonconductive. A positive-going impulse is produced upon the anode 'F20 of the valve 'HO Which is delivered to the signal output and through the capacitor-resistor combination '1I 9 to the control electrode 'H3 of the normally nonconducting valve 7| 2 causing this valve to become conductive giving rise to a negative-going impulse upon its anode IZI which reinforces the negative signal already upon the control electrode lI I of valve H0. Thus the valve 'Fill is maintained in a nonconductive state as long as the valve 'H2 remains conductive. This condition is altered only when the negative impulse traveling along the delay line I9 reaches the tap 306 and is ime pressed upon the control electrode 'H3 of the normally nonconducting valve ll?, thereby returning it to its nonconductive state which results in the impression of a positive signal upon the control grid lll of the valve IIB causing it again to resume its normally conductive state and terminating the positive signal impulse delivered to the signal output from the plate 'IZIJ of said valve 'HIL The signal receiving circuit 'IM which is a conventional flip-flop circuit, as is the signal receiving circuit w3, just described, is reset by a negative impulse in the delay line I9 appearing at the tap 301 and shortly thereafter set up by said impulse appearing at the tap 303 which connects to the setting terminal of the signal receiving circuit lim. Thus this circuit is connected to the delay line I9 in a manner which affords a signal output for the entire circulating signal period excepting the time during which the circulating impulse passes from the delay line tap to tap 3438.

The signal receiving circuit 705, also a conventional iiip-ilop, is set and reset by negative signals derived from the taps 365 and Sill respectively. The signal output of the circuit 105 corresponding in duration to the time elapsing for the passage of a circulating impulse from the tap 385 to the tap 3l Il. The relationship of the signal output to the circulating signal cycle is also determined by the relative position ofthe taps delivering setting and resetting signals to said circuit.

The signal receiving circuit 705 derives its input signals from a plurality of closely spaced taps 79|, SII, and 'HB2 along the delay line IS connected by individual coupling capacitors to the cathodes of crystal diodes itt, 'ISL '132, with their anodes, coupled through a resistor F33 to the control electrode 135 of the normally conducting valve 136 in said signal receiving circuit 106. The said control electrode 735 is biased positively by returning to a plus ten volt bus through a grid resistor 731i, while the screen electrode 331 of said valve 'F36 is returned to a positive potential in the order of seventy Volts and the suppres sor electrode I38 and cathode Mil are returned directly to ground potential. The anode 139 in said normally conducting valve 7345 is returned to a plus 90 volt bus through an anode resistor 'Mil and is conected to a signal output terminal.

The taps lIlI, SII, and 'm2 are spaced closely enough along the delay line I9 so that when a signal circulating impulse passes from one tap to the other the circulating impulse is impressed 14 upon a following tap before it is removed from the preceding tap. In other Words, the circulating impulse duration must be greater than the time required for said impulse to pass from one tap to the other such as from tap 702 to tap 3H or from tap 3H to '102. With these conditions met it is easily seen that a negative impulse is impressed upon the control electrode lfbeginning with the receipt of a negative circulating impulse by the tap 'IilI and endures until the removal of said negative impulse passing the tap 752. By selecting an appropriate number of taps at selected locations along the delay line I9 it is possible to obtain a signal input to the signal receiving circuit 106- of any given duration, approaching a circulating signal cycle and having any position in a phase sense within the circulating signal period. The diodes 130, 13|, and

132 prevent the short-circuiting of the delay line I9 between its taps 10|, 3H, and 702. When a negative signal is impressed upon the control grid '135, the normally conducting valve 136 becomes nonconductve, causing the voltage upon its anode 739 to rise, thereby delivering a positive-going impulse to the signal ouput, which impulse is terminated upon the removal of the negative impulse on the control electrode as occurs when the circulating impulse in the delay line I9 leaves the tap 132.

In summary, output signals of selected duration, said duration maximum being limited by the given circulating signal period, may be easily accomplished by rst setting up and then resetting a flip-flop circuit by means of setting and resetting signals derived respectively at tvvo differing points along the delay line I9, the duration of the signal produced by said flip-nop circuit being dependent upon and equal to the delay time imposed by the delay line I9 to a circulating signal between the points of attachment thereto. Output signals having durations beyond that. of a circulating signal duration are obtainable by deriving the input to a signal receiving circuit from several locations along the delay line IS sufficiently closely spaced to deliver an uninterrupted signal output therefrom.

Referring now to Figure 9 which is a timing diagram illustrating the .signals found in the various parts of the apparatus shown in Figure 8, the signal outputs appearing at the delay line taps are shown with respect to their occurrence during a circulating signal period, as referred to a reference impulse position, there being space for 42 impulses during each circulating signal period. It should be noted that the taps 'Ill I, 3i I, and 'IIIZ are spaced sufliciently closely with respect to a circulating impulse duration to cause the output from said taps to overlap slightly. It should be further noted that such overlapping may be achieved with respect to taps such as 3%, 3dS, 3I by suiciently increasing the duration of a circulating signal impulse without the need or changing their positions along delay line I9. It may be observed that the signal receiving circuit 'i163 derives its setting and resetting signals from the delay line taps 304 and 396, respectively; its output signal being initiated by the receipt of the setting signal and terminated upon the re ceipt of the resetting signal. In a like manner, the signal receiving circuit 'mit is shown to receive a resetting signal from the delay line tap 301 and a setting signal from tap 3l8, thus initiating a signal output upon the receipt of asetting signal which continues until it is terminated by a resetting signal derived from the tap 391- which next assume precedes theltap'308 alongthe'delay line I9 in'the direction of circulating signal travel. The signal receiving circuit 765i has a signal output with a duration and positional orientation determined by the setting and resetting signals derived respectively from the delay line taps .tot and BIS. The signal receiving circuit 3dS derives its input signal' from the taps'li, 3l l and TG2, previously noted, and delivers a signal output having a duration duivalent to and simultaneous with the said input signal'thereto'.4 This last arrangement permits octaininga signaloutput of any given duration up toa circulating signal period which signal output is obtainable during any portion of said circulating signalV period by appropriately deriving signals. along the length of the delay line I9.

Vfnile this invention has been described and illustrated with reference to a specic embodiment, it is to be understood that the invention is capable of various modifications and applications, not departing essentially from the spirit thereof, which will become apparent to those skilled in the art.

W hat isclairned is:

l'. In combination, pulse transler apparatus li aving input and output terminals, a signal transfer link characterized by a predetermined delay connected at one end with the output of said pulse transfer apparatus andv at its other end with the input' of said pulse transfer apparatus, a single pulse device connected with the input of said pulse transfer apparatus, a plurality cf signal responsive devices operatively connected with spacedv regions along said signal transfer link, and clearing apparatus connected between said signal transfer link and said pulse transfer apparatus.

2. In combination, a controlled single pulse device, a pulse forming apparatus having a signal clearing switch, a iirst input terminal operatively connected to said controlled single pulse device, a second input terminal and an output terminal, a signal delay line having an input terminal operatively connected to the output terminal of said pulse forming apparatus and an output terminal operatively connected to the second input terminal of said pulse forming apparatus, and a plurality of signal actuated devices operatively connected to said delay line at points along its length.

3. In combination; a signal line; a controlled single pulse device having an input lead operatively connected to said signal line; a signal gating unit having a rst input lead operatively connected to said signal line, a second input lead operatively connected to said controlled single pulse device', a third input lead and an output lead; a pulse regenerating apparatus having an input lead operatively connected to the output of said signal gating unit and an output terminal, a signal delay line connected at its input end to the output of said pulse regenerating apparatus and connected at its output end to the third input lead of said signal gating unit, and a plurality of signal actuated devices operatively connected to spaced regions along said signal delay line.

4. In combination, a signal line, a controlled single pulse device operatively connected to said signal line, a plurality of signal gating units each operatively connected to said signal line and said controlled single pulse device, a plurality of pulse forming devices each operatively connected to one of said signal gating units, a plurality of signal delay networks each having an input ter- 116 minal operatively connected to'one ofsaid pulse formingdevices andan output terminal operatively connected to a corresponding one of said signal gating units, andl a plurality of signal actuated devices operatively connected to each o-said signal'delay. networks at different points.

5; In combination, a rst signal line, a second signal line, a controlled single pulse device operatively connected to said first signal line, a signal gating unit operatively connected to said second signal line and said controlled single pulse device, a pulse forming apparatus operatively connected to said signalA gating unit, a signal delay network having an input terminal operatively connected to said pulse forming apparatus and an output terminal operatively connected to said signal gating unit, andia plurality of signal actuated devices operatively connected to said signai delay' network at different points.

6. 1n combination, acontrolled single pulse device, an electronic valve pulse forming circuit comprising a tuned capacitor-inductor network' coupled with an electrode structure having a plurality of elements including an input element operatively connected to said controlled single pulse device and an output element, a signal delay line comprising a plurality of capacitive and inductive elements including an input element operatively connected to the output element of said electronic valve pulse forming circuit and an output element operatively connected to the input element of said electronic valve pulse forming circuit, and a plurality of signal actuated devices operatively connected to said signal delay line at points along its length.

7. In combination, a controlled single pulse device, an electronic valve pulse forming circuit comprising a plurality of elements including an input element operatively connected to said controlled single pulse device and an output element, a signal delay line comprising a plurality of capacitive and inductive elements including an input element operatively connected to the output, element of said electronic valve pulse forining circuit and an output element operatively connected to the input element of said electronic valve pulse forming circuit, a plurality of signal compensating networks comprising a plurality of capacitive and inductive elements operatively interposed in said signal delay line at intervals along its length, and a plurality of signal actuated devicesl operatively connected to said delay line at points along its length.

8. In combination, an electric signal propagating delay line, impulse transfer apparatus having an input and an. output connected respectively with the output and input terminals of said delay line, an electric network having a plurality of mutually exclusive stable states, a rst connection between said delay line and said electric network transmitting impulses initiating one of said stable states, and a second connection between said delay line and said electric network transmitting impulses initiating another of said stable states.

9. In combination, an electric transmission line provided with a substantially reflection free termination, a signal transfer link adapted to impress electric impulses on` the input terminal of said transmission line and to receive electric impulses from the outputterminal of said transmission line, an electric network having a plurality of mutually exclusive stable states, a first connection between said transmission line and said 17 electric network transmitting impulses initiating one of said stable states, and a second connection between said transmission line and said electric network transmitting impulses initiating another of said stable states.

l0. In signal recirculating apparatus, a signal line, an electric network having a plurality of mutually exclusive stable states wherein stimuli to one lead initiate one of said states and stimuli to a second lead initiate another or" said states, a first electric valve having a cathode, a control electrode and an anode, a switching device alternatively removing a disabling bias from said control electrode and establishing said one of said states, a connection between said anode and said second lead, a second electric valve having a cathode, a control electrode and an anode, a differentiating circuit connecting said electric network and said second control electrode, a rst transmission line connecting said second anode with a source of anode potential, a first unilateral conductor shunting the anode end of said first transmission line, a pulse forming electric network, a first conditionally operative signal transfer link jointly responsive to stimuli on said signal line and stimuli appearing at said second anode exciting said pulse forming electric network, a normally nonconductive third electric valve having a cathode, a control electrode and an anode, a connection delivering the output of said pulse forming electric network to said third control electrode, a second transmission line connected at one end to a conductor maintained at a relatively positive potential and at its other end to said third anode, a connection between said third cathode and a conductor maintained at a relatively negative potential, a second unilateral conductor connected between said third anode and a conductor maintained at a potential intermediate the rest potentials of said third anode and said third cathode, at least one signal responsive device connected with an intermediate point on said second transmission line, a signal dividing network connected to the supply end of said second transmission line, and a second conditionally operative signal transfer link jointly responsive to stimuli on said signal line and from said signal dividing network exciting said pulse forming network.

11. In combination, a coincidence gate having input and output terminals, a pulse generator for producing a continuous train of uniformly spaced pulses operatively connected to a first input terminal of said coincidence gate, a pulse device for producing a single impulse upon actuation operatively connected to a second input terminal of said coincidence gate, a signal delay line having an input terminal operatively connected to the output terminal of said coincidence gate and an output terminal operatively connected to a third input terminal of said coincidence gate and at least one signal actuated device operatively connected to said signal delay line intermediate its ends.

12. In combination, a coincidence gate having input and output terminals, a pulse generator for producing a continuous train of uniformly spaced pulses operatively connected to a first input terminal of said coincidence gate, a pulse device for producing a single impulse upon actuation operatively connected to a second input terminal of said coincidence gate, a signal delay line having an input terminal operatively connected to the output terminal of said coincidence gate and an output terminal operatively connected to a third input terminal of said coincidence gate, at least one signal actuated device operatively connected to said signal delay line intermediate its ends and clearing apparatus connected between said coincidence gate and said delay line.

13. In combination, a coincidence gate having input and output terminals, a signal line operatively connected to a rst input terminal of said coincidence gate, a single pulse device operatively connected to a second input terminal of said coincidence gate, a signal transfer link characterized by a predetermined delay connected at one end with the output terminal of said coincidence gate and at its other end with a third input terminal of said coincidence gate, whereby coincidence of pulses from said signal line and either of said single pulse device or said signal transfer link causes emission of an output from said coincidence gate, a plurality of signal responsive devices operatively connected with spaced regions along said delay line and clearing apparatus connected between said signal transfer link and. said coincidence gate.

14. In combination, a pulse generator for producing a continuous train of uniformly spaced pulses, a coincidence gate having a first input terminal operatively connected to said pulse generator and an output terminal, a pulse device for producing a single pulse upon actuation having an input terminal operatively connected to said pulse generator and an output terminal operatively connected to a second input terminal of said coincidence gate, a signal transfer link characterized by a predetermined delay connected at one end with the output terminal of said coincidence gate and at its other end With a third input terminal of said coincidence gate, whereby coincidence of pulses from said pulse generator and either of said pulse device or said signal transfer link causes emission of an output from said coincidence gate, at least one signal output line operatively connected to said signal transfer link and clearing apparatus connected between said coincidence gate and said signal transfer link.

References Cited in the le of this patent UNITED STATES PATENTS Number Name Date 2,199,634 Koch May 7, 1940 2,212,173 Wheeler et al. Aug. 20, 1940 2,403,561 Smith July 9, 1946 2,432,180 Tourshou et al. Dec. 9, 1947 2,436,808 Jacobsen et al Mar. 2, 1948 2,444,741 Loughlin July 6, 1948 2,487,995 Tucker Nov. 15, 1949 2,503,909 Hollingsworth Apr. 11, 1950 2,510,987 Levy June 13, 1950 2,617,930 Cutler Nov. 11, 1952 OTHER REFERENCES Electronics, pages to 118. Article, Digital Computer Switching Circuits, by C. H. Page, September 1948. 

